TI SOC EHRPWM based PWM controller

Required properties:
- compatible: Must be "ti,<soc>-ehrpwm".
  for am33xx  - compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
  for am4372  - compatible = "ti,am4372-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm";
  for am654   - compatible = "ti,am654-ehrpwm", "ti-am3352-ehrpwm";
  for da850   - compatible = "ti,da850-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm";
  for dra746 - compatible = "ti,dra746-ehrpwm", "ti-am3352-ehrpwm";
- #pwm-cells: should be 3. See pwm.yaml in this directory for a description of
  the cells format. The only third cell flag supported by this binding is
  PWM_POLARITY_INVERTED.
- reg: physical base address and size of the registers map.

Optional properties:
- clocks: Handle to the PWM's time-base and functional clock.
- clock-names: Must be set to "tbclk" and "fck".

Example:

ehrpwm0: pwm@48300200 { /* EHRPWM on am33xx */
	compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
	#pwm-cells = <3>;
	reg = <0x48300200 0x100>;
	clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
	clock-names = "tbclk", "fck";
};

ehrpwm0: pwm@48300200 { /* EHRPWM on am4372 */
	compatible = "ti,am4372-ehrpwm", "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
	#pwm-cells = <3>;
	reg = <0x48300200 0x80>;
	clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
	clock-names = "tbclk", "fck";
	ti,hwmods = "ehrpwm0";
};

ehrpwm0: pwm@1f00000 { /* EHRPWM on da850 */
	compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
	#pwm-cells = <3>;
	reg = <0x1f00000 0x2000>;
};

ehrpwm0: pwm@4843e200 { /* EHRPWM on dra746 */
	compatible = "ti,dra746-ehrpwm", "ti,am3352-ehrpwm";
	#pwm-cells = <3>;
	reg = <0x4843e200 0x80>;
	clocks = <&ehrpwm0_tbclk>, <&l4_root_clk_div>;
	clock-names = "tbclk", "fck";
};
